Semiconductor storage device

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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Details

C365S189150, C365S189160, C365S205000, C365S230030

Reexamination Certificate

active

07843717

ABSTRACT:
A semiconductor storage device includes a memory array compartmentalized into first and second regions alternately arranged. The second regions are formed by odd and even columns alternately arranged. The semiconductor storage device includes: a memory mat array arranged in each first region; a sense amp array arranged in each second region; local IO lines arranged in each second region and connected to the sense amp array; main IO lines crossing the first and second regions; and a read/write amplifier arranged in each second region and at an intersection region where the local IO lines cross the main IO lines. The read/write amplifier in an odd column is connected to a local IO line therein and to a local IO line in the next odd column. The read/write amplifier in an even column is connected to a local IO line therein and to a local IO line in the next even column.

REFERENCES:
patent: 6678204 (2004-01-01), Nagashima et al.
patent: 6809946 (2004-10-01), Fujisawa et al.
patent: 7266037 (2007-09-01), Mochida
patent: 2007/0147152 (2007-06-01), Sekiguchi et al.
patent: 2008/0013397 (2008-01-01), Park et al.
patent: 05-234377 (1993-09-01), None
patent: 2003-223785 (2003-08-01), None
patent: 2003-346479 (2003-12-01), None
patent: 2006-172577 (2006-06-01), None

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