Synchronous semiconductor device, and inspection system and...

Details Synchronous semiconductor device, and inspection system and... Synchronous semiconductor device, and inspection system and...

Filed on

2008-04-30

Date issued

2010-02-16

Examiner

Karlsen, Ernest F (Department: 2829)

Patent Class

Electricity: measuring and testing

SubClass

Fault detecting in electric circuits and of electric components

SubSubClass

Of individual circuit component or element

Other Related Categories

C365S201000, C714S042000

Type

Reexamination Certificate

Status

active

Patent number

07663392

Description

ABSTRACT:
The present invention provides a synchronous semiconductor device suitable for improving the efficiency of application of electrical stresses to the device, an inspection system and an inspection method thereof in order to efficiently carrying out a burn-in stress test. A command latch circuit having an access command input will output a low-level pulse in synchronism with an external clock. The pulse will pass through a NAND gate of test mode sequence circuit and a common NAND gate to output a low-level internal precharge signal, which will reset a word line activating signal from the control circuit. Simultaneously, an internal precharge signal passing through the NAND gate will be delayed by an internal timer a predetermined period of time to output through the NAND gate a low-level internal active signal, which will set a word line activating signal from the control circuit.

REFERENCES:
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patent: 5627478 (1997-05-01), Habersetzer et al.
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patent: 5808961 (1998-09-01), Sawada
patent: 6061285 (2000-05-01), Tsukikawa
patent: 6385125 (2002-05-01), Ooishi et al.
patent: 6470467 (2002-10-01), Tomishima et al.
patent: 6489819 (2002-12-01), Kono et al.
patent: 6546503 (2003-04-01), Ooishi

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