Method and system for determining a clock input mode

Details Method and system for determining a clock input mode Method and system for determining a clock input mode

2008-02-13

2010-02-02

Luu, An T (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S018000, C327S063000, C327S099000

Reexamination Certificate

active

07656216

ABSTRACT:
A method and system is provided for clock input mode selection. When a signal provided on one of two clock input terminals is received, the received signal is considered in connection with a second input signal in order to determine whether the first input signal and the second input signal satisfy a pre-determined condition. Based on whether the pre-determined condition is met, a clock input mode is selected that indicates whether the clock input terminals provide a differential clock input or a single-ended digital clock input.

REFERENCES:
patent: 6300816 (2001-10-01), Nguyen
patent: 6794919 (2004-09-01), Volk et al.
patent: 6836156 (2004-12-01), Chien
patent: 6933752 (2005-08-01), Dreps et al.
patent: 7183831 (2007-02-01), Ikeda

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