Method and system for fast implementation of an...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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07730116

ABSTRACT:
A processor includes a multi-stage pipeline having a plurality of stages. Each stage is capable of receiving input values and providing output values. Each stage performs one of a plurality of data transformations using the input values to produce the output values. The data transformations collectively approximate at least one of: a discrete cosine transform and an inverse discrete cosine transform. The stages do not use any multipliers to perform the data transformations.

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patent: 5285402 (1994-02-01), Keith
patent: 5477478 (1995-12-01), Okamoto et al.
patent: 5801975 (1998-09-01), Thayer et al.
patent: 6460061 (2002-10-01), Dick
patent: 7035332 (2006-04-01), He et al.

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