Semiconductor memory device with stores plural data in a cell

Details Semiconductor memory device with stores plural data in a cell Semiconductor memory device with stores plural data in a cell

2008-05-09

2010-06-15

Nguyen, Viet Q (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185030, C365S185180, C365S185260, C365S185140

Reexamination Certificate

active

07738302

ABSTRACT:
A memory cell array is configured to have a plurality of memory cells arranged in a matrix, each of the memory cells being connected to a word line and a bit line and being capable of storing n values (n is a natural number equal to or larger than 3). A control circuit controls the potentials of the word line and bit line according to input data and writes data into a memory cell. The control circuit writes data into the memory cell to a k-valued threshold voltage (k<=n) in a write operation, precharges the bit line once, and then changes the potential of the word line an i number of times to verify whether the memory cell has reached an i-valued (i<=k) threshold voltage.

REFERENCES:
patent: 5774397 (1998-06-01), Endoh et al.
patent: 5870218 (1999-02-01), Jyouno et al.
patent: 5969985 (1999-10-01), Tanaka et al.
patent: 5982667 (1999-11-01), Jyouno et al.
patent: 6028792 (2000-02-01), Tanaka et al.
patent: 6078519 (2000-06-01), Kanamitsu et al.
patent: 6243290 (2001-06-01), Kurata et al.
patent: 6285597 (2001-09-01), Kawahara et al.
patent: 6288935 (2001-09-01), Shibata et al.
patent: 6333871 (2001-12-01), Tsujikawa et al.
patent: 6400601 (2002-06-01), Sudo et al.
patent: 6418057 (2002-07-01), Hosogane
patent: 6426892 (2002-07-01), Shibata et al.
patent: 6438035 (2002-08-01), Yamamoto et al.
patent: 6496412 (2002-12-01), Shibata et al.
patent: 6525964 (2003-02-01), Tanaka et al.
patent: 6657891 (2003-12-01), Shibata et al.
patent: 6876578 (2005-04-01), Shibata et al.
patent: 7016226 (2006-03-01), Shibata et al.
patent: 7106627 (2006-09-01), Shibata et al.
patent: 7120052 (2006-10-01), Shibata et al.
patent: 7196933 (2007-03-01), Shibata
patent: 7245528 (2007-07-01), Shibata et al.
patent: 7376009 (2008-05-01), Shibata et al.
patent: 2004/0170056 (2004-09-01), Shibata et al.
patent: 2005/0169057 (2005-08-01), Shibata et al.
patent: 2007/0121378 (2007-05-01), Shibata et al.
patent: 2007/0253250 (2007-11-01), Shibata et al.
patent: 2000-76872 (2000-03-01), None
patent: 2000-195280 (2000-07-01), None
patent: 2001-67884 (2001-03-01), None
patent: 02006172523 (2006-06-01), None

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