Logic control system for efficient memory to CPU transfers

Details Logic control system for efficient memory to CPU transfers Logic control system for efficient memory to CPU transfers

1981-09-16

1984-06-19

Nusbaum, Mark E.

Boots, shoes, and leggings

G06F 300, G06F 700, G06F 1300

Patent

active

044556063

ABSTRACT:
This disclosure relates to a control system for transferring binary words from a memory system. One thirty two bit double word may be loaded into a selected two of four sixteen bit registers. As a first of the two selected registers is read, another thirty two bit word may be loaded into the unselected registers. Alternatively, sixteen bit single words may be loaded into and read from the registers. When a word has procedural information, it is read from the registers onto a CPU control bus via a multiplexer. When a word is an encoded computer instruction to the CPU, it is read from the registers into a logic unit via a multiplexer. A decoded instruction from the logic unit is read onto a CPU control bus.

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