System and method for de-scrambling and bit-order-reversing...

Cryptography – Particular algorithmic function encoding

Reexamination Certificate

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Details

C380S255000, C380S257000, C370S310100, C712S022000

Reexamination Certificate

active

07734041

ABSTRACT:
A method and apparatus are disclosed for efficiently de-scrambling and bit-order-reversing one or more bytes of data according to DSL standards on a processor. In a preferred embodiment, this is achieved by providing an instruction for de-scrambling and bit-order-reversing one or more bytes of data according to DSL standards. Accordingly, the invention advantageously provides a processor with the ability to de-scramble and bit-order-reverse data with a single instruction thus allowing for more efficient and faster de-scrambling operations for subsequent processing.

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