System for modeling LPAR behaviors in a simulation tool

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Computer or peripheral device

Reexamination Certificate

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C710S005000, C710S008000, C710S036000, C713S001000, C709S226000, C718S104000

Reexamination Certificate

active

07827021

ABSTRACT:
A simulation tool for modeling LPAR behavior in a mainframe computer. The simulation tool comprises: a system for calculating a resource percentage, wherein the resource percentage represents a percentage of total resources allocated to the LPAR, wherein the resource percentage is equal to: 100%−a percentage of resources allocated to all other LPARs running in the simulated computer; a system for calculating a time slice percentage for the LPAR based on the resource percentage and CP (central processor) data, wherein: time slice percentage=((resource percentage)×(# of physical CPs))/(# of logical CPs); a system for determining a CP (central processor) percentage, wherein the CP percentage represents a percentage of time that all physical CPs in the computer being modeled have been allocated to the LPAR; a system for determining causing the computer simulation not to dispatch CPs to the LPAR for a current modeling interval if the CP percentage is greater than the time slice percentage; and a system for outputting and displaying the behavior of the modeling.

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