Stabilized voltage generating circuit and internal voltage down

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

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323266, G05F 140, G05F 144

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055571930

ABSTRACT:
A method and an apparatus of an internal voltage down converter having good transient response characteristics and small chip real estate, includes a differential amplifier for comparing a voltage on an internal power supply line with a reference voltage, a MOS transistor for generating an internal supply voltage from an external supply voltage, by receiving the output of the differential amplifier at the gate, and a feed back capacitive element provided between the internal power supply line and the gate of the MOS transistor.

REFERENCES:
patent: 4928056 (1990-05-01), Pease
patent: 5036269 (1991-07-01), Murari et al.
patent: 5357416 (1994-10-01), Kitano et al.
JP 4-17190 A; In: Patents Abstracts of Japan; P-1344, vol. 16, No. 175, Apr. 27, 1992.
Tietze, U./Schenk, CH.: "Halbleiter-Schaltungstechnik", Springer-Verlag, Berlin, 3rd. edit., 1974, pp. 191-197.
"A Tunable CMOS-DRAM Voltage Limiter with Stabilized Feedback Amplifier", M. Horiguchi et al., IEEE Journal of Solid-State Circuits, vol. 25, No. 5, Oct. 1990, pp. 1129-1135.
"0.5 um . . . 16 M DRAM", Nikkei Micro-Device, Feb. 1990, pp. 115-122.

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