Stacked die structure with an underlying copper-topped die

Details Stacked die structure with an underlying copper-topped die Stacked die structure with an underlying copper-topped die

2007-08-24

2010-12-07

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257SE23027

Reexamination Certificate

active

07847385

ABSTRACT:
A copper-topped die, which has exposed copper lines and pads, is utilized as the lower die in a stacked die structure. A non-conductive material is formed over the lower copper-topped die, and then selectively removed so that the non-conductive material covers and lies between the copper lines while none of the non-conductive material lies over the copper pads. An upper die is then attached to the non-conductive material.

REFERENCES:
patent: 2007/0057357 (2007-03-01), Chen
patent: 2008/0136005 (2008-06-01), Lee et al.

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