Semiconductor memory system including a plurality of...

Details Semiconductor memory system including a plurality of... Semiconductor memory system including a plurality of...

2008-02-07

2010-02-02

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185050, C365S185110, C365S185170

Reexamination Certificate

active

07656711

ABSTRACT:
A communication line is connected to first and second chips, and held at a first signal level. A monitor circuit changes a signal level of the communication line from the first signal to a second signal level while one of the first and second chips uses a current larger than a reference current. When the signal level of the communication line is the second signal level, the other of the first and second chips is controlled to a wait state that does not transfer to an operating state of using a current larger than the reference current.

REFERENCES:
patent: 6301165 (2001-10-01), Kim
patent: 11-242632 (1999-09-01), None

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