Bit line precharge circuit

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S203000, C365S185210, C365S189090, C365S185180

Reexamination Certificate

active

07542352

ABSTRACT:
A bit line precharge circuit is provided by the present invention. The bit line precharge circuit groups the precharge sub-circuits to share one drain bias controller. The drain bias controller has an inverter and a NMOS clamping transistor to form a negative feedback loop, to quickly precharge bit lines. When operating in read operation, only one drain bias controller is needed. Therefore, it can greatly save the layout area and operating power consumption without any extra dummy bit line or layout expansion.

REFERENCES:
patent: 7082069 (2006-07-01), Chou et al.

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