Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2006-02-23
2009-10-20
Chen, Kin-Chan (Department: 1792)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S723000, C438S725000
Reexamination Certificate
active
07605090
ABSTRACT:
A layer structure and process for providing sublithographic structures are provided. A first auxiliary layer is formed over a surface of a carrier layer. A lithographically patterned second auxiliary layer structure is formed on a surface of the first auxiliary layer. The first auxiliary layer is anisotropically etched using the patterned second auxiliary layer structure as mask to form an anisotropically patterned first auxiliary layer structure. The anisotropically patterned first auxiliary layer structure is isotropically etched back using the patterned second auxiliary layer structure to remove subsections below the second auxiliary layer structure and to form an isotropically patterned first auxiliary layer structure. A mask layer is formed over the carrier layer including the subsections beneath the second auxiliary layer structure and is anisotropically etched down to the carrier layer to form the sublithographic structures. The first and second auxiliary layer structures are removed to uncover the sublithographic structures.
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Gutsche Martin
Seidl Harald
Brinks Hofer Gilson & Lione
Chen Kin-Chan
Infineon - Technologies AG
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