Method, apparatus, and system providing adjustable memory...

Details Method, apparatus, and system providing adjustable memory... Method, apparatus, and system providing adjustable memory...

2006-08-29

2009-06-16

Luu, Pho M. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185080, C365S200000, C365S201000, C365S207000

Reexamination Certificate

active

07548459

ABSTRACT:
A method, apparatus and system providing a memory device having an array of cells which may be selectively designated for either error correction code use or redundancy cell use.

REFERENCES:
patent: 7403417 (2008-07-01), Cohen
patent: 2003/0043651 (2003-03-01), Kojima et al.
patent: 2007/0121396 (2007-05-01), Nitzan et al.

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