Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reissue Patent
2004-09-30
2009-06-16
Luu, Chuong Anh (Department: 2892)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S638000, C438S778000, C438S713000
Reissue Patent
active
RE040748
ABSTRACT:
A process for producing a semiconductor device for forming a highly reliable wiring structure is provided that solves the problem occurring on using a xerogel or a fluorine resin in an inter level dielectric between the wirings to decrease a wiring capacitance, and the problem occurring on misalignment. A process for producing a semiconductor device comprising an inter level dielectric containing a xerogel film or a fluorine resin film comprises a step of forming, on the inter level dielectric comprising a lower layer of the inter level dielectric formed with an organic film and an upper layer of the inter level dielectric formed with a xerogel film or a fluorine resin film, a first mask to be an etching mask for forming a via contact hole by etching the inter level dielectric, and a step of forming, on the first mask, a second mask, which comprises a different material from the first mask, to be an etching mask for forming a wiring groove by etching the inter level dielectric.
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Hasegawa Toshiaki
Miyata Koji
Taguchi Mitsuru
Kananen Ronald P.
Luu Chuong Anh
Rader & Fishman & Grauer, PLLC
Sony Corporation
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