Method for producing semiconductor wafer

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Compound semiconductor

Reexamination Certificate

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Details

C438S087000, C438S093000, C438S455000, C438S473000, C257S012000, C257S019000, C257S616000, C257SE21102

Reexamination Certificate

active

07550309

ABSTRACT:
The present invention is a method for producing a semiconductor wafer, comprising at least steps of, epitaxially growing a Si1-XGeXlayer (0<X<1) on an SOI wafer, forming a Si1-YGeYlayer (0≦Y<X) on the epitaxially grown Si1-XGeXlayer, and then enriching Ge in the epitaxially grown Si1-XGeXlayer by an oxidation heat treatment so that the Si1-XGeXlayer becomes an enriched SiGe layer, wherein, at least, the oxidation heat treatment is initiated from 950° C. or less under an oxidizing atmosphere, and the oxidation is performed so that the formed Si1-YGeYlayer remains during a temperature rise to 950° C. Thereby, there can be provided a method for producing a semiconductor wafer by which the lattice relaxation of the SiGe layer in an SGOI wafer can be sufficiently performed by a heat treatment for a short time and its production cost can be reduced.

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T. Tezuka et al., “Fabrication of Strained Si on an Ultrathin SiGe-on-Insulator Virtual Substrate with a High-Ge Fraction”, Applied Physics Letters, vol. 79, No. 12, Sep. 2001, pp. 1798-1800.
N. Sugiyama et al., “Experimental Evidence of Low Dislocation Density of SiGe-on-Insulator Substrates Fabricated by Oxidizing SiGe/SOI Structures”, Extended Abstracts of the 2002 International Conference on Solid State Devices and Materials, 2002, pp. 146-147.
T. Tezuka et al., 61stWorkshop Information Packet in Separate Meeting for Bulk Growth in Japanese Association for Crystal Growth Cooperation, May 2004, p. 23.

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