Logic signal level conversion circuit

Details Logic signal level conversion circuit Logic signal level conversion circuit

1986-12-23

1987-10-13

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307546, 307553, 307455, 307264, H03K 19092, H03K 500, H03K 19086, H03K 508

Patent

active

047000872

ABSTRACT:
A circuit for converting an input logic signal to an output logic signal having differing high and/or low logic voltage levels includes an output transistor and a load resistor coupling a collector of the output transistor to a supply voltage. The emitter of the output transistor is grounded. An input stage clamps a base of the output transistor to ground when the input signal voltage level is low, thereby turning the output transistor off and allowing the load resistor to pull the output signal, produced at the output transistor collector, up to its high logic level. When the input signal is high, the input stage unclamps the base of the output transistor from ground and a feedback stage responsive to the output signal supplies feedback current to the base of the output transistor, which feedback current increases with the magnitude of the output logic signal. The feedback current turns on the transistor, thereby increasing load current through the load resistor so as to reduce the output signal level. As the output signal level falls, the feedback stage reduces the feedback current such that the output signal reaches equilibrium at its low logic level and such that the output transistor is unsaturated.

REFERENCES:
patent: 3473047 (1969-10-01), Bohn et al.
patent: 3676713 (1972-07-01), Wiedmann
patent: 3699355 (1972-10-01), Madrazo et al.
patent: 3985954 (1976-10-01), Kuniyoshi et al.
patent: 4055794 (1977-10-01), Ickes et al.
patent: 4415817 (1983-11-01), Fletcher

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