Consistent precharge circuit for cascode voltage switch logic

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307452, 307453, 307481, 307279, H03K 19003, H03K 19096

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active

047000864

ABSTRACT:
A precharge circuit for a cascode voltage switch in which at the beginning of the precharge phase the output state is memorized and the output is isolated from the precharging points. Both the positive and negative ends of the discharge paths are precharged with the gates of the switches in all paths held in their memorized states. Towards the end of precharging, the output is reconnected to the normal precharging point so that it goes low. Then the positive and negative precharging points are reconnected for their evaluation configuration.

REFERENCES:
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patent: 3943377 (1976-03-01), Suzuki
patent: 3984703 (1976-10-01), Jorgensen
patent: 3989955 (1976-11-01), Suzuki
patent: 4040015 (1977-08-01), Fukuda
patent: 4345170 (1982-08-01), Sampson, III
patent: 4570084 (1986-02-01), Griffin et al.
Bilger et al, "Single-Ended Unclocked CMOS Logic"; IBM-TDB; vol. 27, No. 10B, pp. 6012-6013; 3/1985.

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