Method for isolating non-volatile memory cells

Details Method for isolating non-volatile memory cells Method for isolating non-volatile memory cells

1994-12-01

1996-09-17

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437 70, 257316, A01L 218247

Patent

active

055567983

ABSTRACT:
A method of fabricating semiconductor integrated circuit non-volatile memory devices having memory cell isolation between the memory cells without increasing device dimension. Active regions are defined by forming field oxide layers on a on semiconductor substrate of a first type. Lightly-doped regions of the first type are formed underneath field oxide layers. Additional heavily-doped regions of the first type are formed within each of the lightly-doped regions. Active regions on the semiconductor substrate are implanted with impurities of a second type to form drains and sources for the memory cells. Floating gate layers are formed on tunnel oxide layers, the tunnel oxide layers separating the floating gate layers from the active regions. The presence of the lightly-doped region improves the breakdown voltage, while the additional heavily-doped regions within each of the lightly-doped regions increases threshold and punchthrough voltages for the inherent parasitic transistors of the memory device.

REFERENCES:
patent: 5466622 (1995-11-01), Cappelletti

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