Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-06-20
2009-02-17
Le, Thong Q (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185210, C365S196000, C365S189090
Reexamination Certificate
active
07492641
ABSTRACT:
A non-volatile semiconductor memory device includes a memory cell array and a sense amplifier, the device being internally controlled to execute a write sequence with write pulse applications and write-verify operations repeated for writing a set of memory cells selected in the memory cell array, wherein the sense amplifier performs a write speed verify operation for detecting write speed of plural memory cells to be written into a certain data state after a certain write pulse application at the beginning of the write sequence, thereby getting discriminating data for classifying the plural memory cells into first and second cell groups, and after the write speed verify operation, the first and second cell groups are alternately written on different write conditions from each other with reference to the discriminating data.
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patent: 7139192 (2006-11-01), Wong
patent: 2002/0003722 (2002-01-01), Kanda et al.
patent: 2004/0264264 (2004-12-01), Yaegashi et al.
patent: 2000-113686 (2000-04-01), None
Hosono Koji
Nakamura Hiroshi
Kabushiki Kaisha Toshiba
Le Thong Q
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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