Semiconductor memory device selectively enabling address...

Details Semiconductor memory device selectively enabling address... Semiconductor memory device selectively enabling address...

2006-09-29

2009-11-10

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Addressing

Including particular address buffer or latch circuit...

C365S189050

Reexamination Certificate

active

07616521

ABSTRACT:
A semiconductor memory device can reduce needless current consumption when addresses are inputted. A semiconductor memory device includes a clock enable buffering unit for receiving a clock enable signal to output a buffer enable signal, an address buffer control unit for generating an address buffer control signal in response to a plurality of data output mode, and an address buffering unit for receiving an address in response to the buffer enable signal and the address buffer control signal.

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Korean Office Action issued in corresponding Korean Patent Application No. KR 10-2006-0049129, dated Apr. 26, 2007.

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