Multi-domain vertical alignment pixel structure

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material

Reexamination Certificate

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Details

C257S072000, C257SE27026, C349S043000, C349S054000

Reexamination Certificate

active

07569855

ABSTRACT:
A multi-domain vertical alignment pixel structure including an active device, a passivation layer, a first pixel electrode, a second pixel electrode, a capacitor-coupling electrode and a semiconductor layer is provided. The active device is disposed on the substrate and has an insulating layer, the passivation layer covers the active device and a part of the insulating layer, the first pixel electrode and second pixel electrode are disposed on the passivation layer and electrically insulated from each other. In addition, the capacitor-coupling electrode is disposed between the second pixel electrode and the substrate. The semiconductor layer is disposed between the insulating layer and the passivation layer, wherein the insulating layer and the passivation layer have a trench and a lateral etched groove located on the sidewall of the trench, and the lateral etched groove exposes the side edge of the semiconductor layer.

REFERENCES:
patent: 6919932 (2005-07-01), Ahn et al.
patent: 2005/0012872 (2005-01-01), Beak
patent: 2005/0036091 (2005-02-01), Song
patent: 2006/0012726 (2006-01-01), Wu et al.
patent: 200528806 (2005-09-01), None

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