Electrical computers and digital processing systems: processing – Instruction issuing
Reexamination Certificate
2005-10-14
2009-02-03
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Instruction issuing
C712S218000, C712S228000
Reexamination Certificate
active
07487335
ABSTRACT:
One embodiment of the present invention provides a system that facilitates deferring execution of instructions with unresolved data dependencies as they are issued for execution in program order. During a normal-execution mode, the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system generates a checkpoint, which includes a checkpointed version of the register file. Next, the system defers the instruction, which involves storing the instruction along with any resolved source operands for the instruction into a deferred buffer. The system then executes subsequent instructions in an execute-ahead mode which operates on a future version of the register file, wherein instructions that cannot be executed because of unresolved data dependencies are deferred, and wherein other non-deferred instructions are executed in program order. If the unresolved data dependency is resolved during the execute-ahead mode, the system executes deferred instructions in a deferred mode, which operates on a deferred version of the register file, wherein deferred instructions which can be executed are executed in program order, and wherein other deferred instructions that still cannot be executed because of unresolved data dependencies are deferred again.
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Chaudhry Shailender
Haq Syed I.
Luu Khanh
Rahman Mohammed M.
Chan Eddie P
Park Vaughan & Fleming LLP
Sun Microsystems Inc.
Vicary Keith
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