Semiconductor memory device having column decoder

Details Semiconductor memory device having column decoder Semiconductor memory device having column decoder

Filed on

2006-09-19

Date issued

2009-06-16

Examiner

Nguyen, VanThu (Department: 2824)

Patent Class

Static information storage and retrieval

SubClass

Addressing

SubSubClass

Particular decoder or driver circuit

Other Related Categories

C365S229000

Type

Reexamination Certificate

Status

active

Patent number

07548484

Description

ABSTRACT:
A semiconductor memory device includes a cell matrix having a number of cells, a multiplicity of column decoders for selectively activating the cells in response to code signals containing column address information for the cells, wherein each column decoder contains a pre-driving unit for providing a state output signal transiting between a power supply voltage and a source voltage in response to the code signals and a driving unit for outputting a column selection signal to activate a corresponding cell in response to the state output signal, wherein the pre-driving unit and the driving unit include at least one PMOS transistor and at least one NMOS transistor receiving a pumping voltage and a back-bias voltage, respectively, through their bulk, the pumping voltage having a voltage level higher than that of the power supply voltage and the back-bias voltage having a voltage level lower than that of a ground voltage.

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