Semiconductor memory and operating method of same

Static information storage and retrieval – Addressing – Sync/clocking

Reexamination Certificate

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C365S190000, C365S202000, C365S203000

Reexamination Certificate

active

07633831

ABSTRACT:
An operation control circuit carries out a first access operation upon receipt of a first access command during activation of a chip enable signal, and carries out a second access operation accessing a memory core in a shorter time than the first access operation, upon receipt of the next access command during activation of the chip enable signal. For this reason, two types of access operations whose access times differ can be carried out by receiving the same access command at the same access terminal. A dedicated terminal for distinguishing between the two types of operations does not need to be formed in a controller, etc., which accesses a semiconductor memory. Selective use of the first and second access operations improves the operation efficiency of the semiconductor memory. Consequently, the operation efficiency of the semiconductor memory can be improved without increasing the cost of a system incorporating the semiconductor memory.

REFERENCES:
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patent: 5894312 (1999-04-01), Ishiwata et al.
patent: 6061297 (2000-05-01), Suzuki
patent: 6442088 (2002-08-01), Tsuchida et al.
patent: 2003/0031073 (2003-02-01), Yahata et al.
patent: 2004/0165472 (2004-08-01), Yamazaki
patent: 2005/0068843 (2005-03-01), Takeuchi
patent: 2005/0078506 (2005-04-01), Rao et al.
patent: 2003-59264 (2003-02-01), None
patent: 2004-259318 (2004-09-01), None

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