Thick oxide P-gate NMOS capacitor for use in a low-pass...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S368000, C438S307000, C438S379000, C327S157000, C327S558000

Reexamination Certificate

active

07547956

ABSTRACT:
A circuit with dielectric thicknesses is presented that includes a low-pass filter including one or more semiconductor devices having a thick gate oxide layer, while further semiconductor devices of the circuit have thin gate oxide layers. The low-pass filter semiconductor device includes an N-type substrate, a P-type region formed on the N-type substrate, a thick gate oxide layer formed over the P-type region, a P+gate electrode formed over the thick gate oxide layer and coupled to a first voltage supply line, and P+pick-up terminals formed in the P-type region adjacent the gate electrode and coupled to a second voltage supply line. The low-pass filter semiconductor device acts as a capacitor, whereby a gate-to-substrate voltage is maintained at less than zero volts to maintain a stable control voltage for the circuit.

REFERENCES:
patent: 4042945 (1977-08-01), Lin et al.
patent: 4249194 (1981-02-01), Rogers
patent: 4335359 (1982-06-01), Kriedt et al.
patent: 4377029 (1983-03-01), Ozawa
patent: 4474624 (1984-10-01), Matthews
patent: 4876220 (1989-10-01), Mohsen et al.
patent: 5045966 (1991-09-01), Alter
patent: 5130564 (1992-07-01), Sin
patent: 5233314 (1993-08-01), McDermott et al.
patent: 5608258 (1997-03-01), Rajkanan et al.
patent: 5787135 (1998-07-01), Clark
patent: 5793074 (1998-08-01), Choi et al.
patent: 5914513 (1999-06-01), Shenai et al.
patent: 5962887 (1999-10-01), Manning et al.
patent: 6031429 (2000-02-01), Shen
patent: 6055193 (2000-04-01), Manning et al.
patent: 6100770 (2000-08-01), Litwin et al.
patent: 6140834 (2000-10-01), Takahashi
patent: 6303957 (2001-10-01), Ohwa
patent: 6351020 (2002-02-01), Tarabbia et al.
patent: 6433398 (2002-08-01), Suzuki et al.
patent: 6472233 (2002-10-01), Ahmed et al.
patent: 6590247 (2003-07-01), Ghilardelli et al.
patent: 6621128 (2003-09-01), Lee et al.
patent: 6828654 (2004-12-01), Tam et al.
patent: 2002/0042172 (2002-04-01), Kuroda et al.
patent: 2002/0084492 (2002-07-01), Osanai et al.
patent: 2003/0082895 (2003-05-01), Ko et al.
patent: 0 902 483 (1999-03-01), None
patent: 0 910 170 (1999-04-01), None
patent: 06-132728 (1994-05-01), None
patent: 06132728 (1994-05-01), None
patent: WO 97/18588 (1997-05-01), None
patent: WO 01/46989 (2001-06-01), None
mos (Behavioral MOSFET Model), Mar. 1996.
Partial International Search Report cited in European Application No. EP 02 25 8965 dated Aug. 4, 2008.
Lim et al., “A Low-Noise Phase-Locked Loop Design by Loop Bandwith Optimization,”IEEE J. Solid-State Circuits 35(6):807-815 (2000).
International Search Report cited in European Application No. EP 02 25 8965 dated Oct. 24, 2008.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Thick oxide P-gate NMOS capacitor for use in a low-pass... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Thick oxide P-gate NMOS capacitor for use in a low-pass..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Thick oxide P-gate NMOS capacitor for use in a low-pass... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4108742

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.