Semiconductor memory device having a plurality of chips and...

Details Semiconductor memory device having a plurality of chips and... Semiconductor memory device having a plurality of chips and...

2004-09-24

2009-06-02

Luu, Pho M. (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S189050, C365S189070, C365S191000

Reexamination Certificate

active

07542323

ABSTRACT:
One package contains a plurality of memory chips. Each memory chip has an I/O terminal which generates a busy signal. The busy signal enables a busy state when a power supply voltage value reaches a specified and guaranteed range after a power-on sequence. The busy signal maintains the busy state until completion of initialization operations for the plurality of memory chips. The busy signal releases the busy state after completion of all initialization operations for the plurality of memory chips.

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Satoshi Otsuka, “Application of Uniform-Block Type Flash Memory to Main Memory”,Electronic Technology, Japan: Nikkan Kogyou Shimbunsha (Transliterated), Nov. 1, 1992, vol. 34, No. 12, pp. 16-22.

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