Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-03-28

2009-02-24

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185200

Reexamination Certificate

active

07495963

ABSTRACT:
A semiconductor memory device includes: first and second cell arrays each having electrically rewritable and non-volatile memory cells arranged, memory cells in the main parts serving as information cells used for storing data, the remaining parts as reference cells used for driving a reference current; three or more bit line pairs disposed in the first and second cell arrays, respectively; a sense amplifier so shared by the bit line pairs as to sequentially detect cell current differences between the information cells and the reference cells coupled to the bit line pairs; and first and second data latches arranged to store write data to be written into the first and second cell arrays, each number of the first and second data latches being equal to that of the bit line pairs, which share the sense amplifier and are simultaneously selected.

REFERENCES:
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patent: 6906951 (2005-06-01), Wong
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patent: 2006/0239073 (2006-10-01), Toda
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patent: 2007/0236985 (2007-10-01), Edahiro et al.
patent: 2005/285161 (2005-10-01), None
U.S. Appl. No. 11/864,089, filed Sep. 28, 2007, Edahiro et al.

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