Ethernet controller with excess on-board flash for...

Details Ethernet controller with excess on-board flash for... Ethernet controller with excess on-board flash for...

2004-06-30

2009-11-24

Mesfin, Yemane (Department: 2444)

Electrical computers and digital processing systems: multicomput

Multicomputer data transferring via shared memory

Partitioned shared memory

C711S153000

Reexamination Certificate

active

07624157

ABSTRACT:
A single chip network controller for interfacing between a physical network and a processing system on the media side of the network controller. The network controller includes a physical layer for receiving data for transmission to the network and encoding the received data for transmission thereto and for receiving data from the network, and for receiving data from the network and decoding the received data. A media layer is provided for interfacing with the processing system for receiving data from the processing system for interface with the physical layer for encoding and transmission thereof and for receiving decoded data from the physical layer and providing access thereto by the processing system. An on-chip non-volatile memory is provided having a first portion associated with configuration information for configuring the operation of the physical layer and the media layer, and a second portion thereof that is accessible by the processing system on the media side of the network controller. A memory interface allows the processing system to interface with the second portion of the memory, such that the processing system has an expanded memory capability.

REFERENCES:
patent: 6108692 (2000-08-01), Van Seters et al.
patent: 6591302 (2003-07-01), Boucher et al.
patent: 6665306 (2003-12-01), Thakur et al.
patent: 6717952 (2004-04-01), Jones et al.
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patent: 6879582 (2005-04-01), Dhara et al.
patent: 7191241 (2007-03-01), Boucher et al.
patent: 2006/0294312 (2006-12-01), Walmsley

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