Sensing scheme for non-volatile memories

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518523, 36518525, 36518909, 3652335, G11C 1606

Patent

active

057989672

ABSTRACT:
A sensing circuit charges the bit lines of an associated memory array using one or more large-area pass transistors during reading operations of a selected memory cell of the memory array. In this manner, the read speed of the memory array is independent of the channel current of the memory cell. A sink transistor sinks a constant current from the selected bit line during reading to improve the noise margin of the sensing circuit so that memory arrays associated with the sensing circuit do not require the reference bit lines.

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