Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1997-10-28
1999-06-15
Brown, Peter Toby
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438255, 438964, H01L 2120
Patent
active
059131284
ABSTRACT:
A method to form a texturized polysilicon surfaced capacitor plate structure and a texturized polysilicon surfaced capacitor plate structure formed by the method are disclosed. The method steps are: depositing an amorphous silicon layer over a capacitor plate by plasma dissociation of SiH.sub.4 ; exposing the amorphous silicon layer to a mixture of CF.sub.4 and Ar; forming amorphous silicon seeding sites that are distributed on the surface of the first amorphous silicon layer by exposing the first amorphous layer to fluorine atoms; and vacuum annealing the amorphous silicon layer to form a texturized polysilicon on the capacitor plate, where the step of vacuum annealing is performed after the amorphous silicon material is exposed to the fluorine atoms.
REFERENCES:
patent: Re35420 (1997-01-01), Cathey et al.
patent: 5278091 (1994-01-01), Fazan et al.
patent: 5340765 (1994-08-01), Dennison et al.
patent: 5407534 (1995-04-01), Thakur
patent: 5663090 (1997-09-01), Dennison et al.
patent: 5691228 (1997-11-01), Ping et al.
patent: 5721171 (1998-02-01), Ping et al.
patent: 5759262 (1998-06-01), Weimer et al.
patent: 5770500 (1998-08-01), Batra et al.
Brown Peter Toby
Micro)n Technology, Inc.
Thomas Toniae M.
LandOfFree
Method for forming texturized polysilicon does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming texturized polysilicon, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming texturized polysilicon will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-409931