Apparatus for and method of biasing a transistor

Details Apparatus for and method of biasing a transistor Apparatus for and method of biasing a transistor

2007-12-04

2009-06-09

Pascal, Robert (Department: 2817)

Amplifiers

With amplifier condition indicating or testing means

C330S296000

Reexamination Certificate

active

07545206

ABSTRACT:
An apparatus for biasing a transistor, comprising: a controllable bias generator; a test circuit; a digital Mthorder differentiator responsive to an output of the test circuit; and a controller responsive to the digital Mthorder differentiator for controlling the controllable bias generator; wherein the test circuit is configured to calculate an Lthorder derivative of the transistor's performance.

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patent: WO 02/063768 (2002-08-01), None
patent: WO 03/079587 (2003-09-01), None
PCT Search Report, PCT/US2007/005749, Jul. 4, 2007.
Millman, Jacob, “Microelectronics : Digital and Analog Circuits and Systems”, (ISBN 0-07-Y66410-2), pp. 244-245.
Kang, S., et al., “Linearity Analysis of CMOS for RF Application”, IEEE Transactions on Microwave Theory and Techniques, vol. 51, No. 3, Mar. 2003.

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