Computer graphics processing and selective visual display system – Computer graphics processing – Graph generating
Reexamination Certificate
2006-07-28
2009-10-20
Tung, Kee M (Department: 2628)
Computer graphics processing and selective visual display system
Computer graphics processing
Graph generating
C345S619000, C711S163000
Reexamination Certificate
active
07605816
ABSTRACT:
Mechanisms are disclosed that may allow certain memory access control algorithms to be implemented efficiently. When memory access control is based on controlling changes to an address translation map (or set of maps), it may be necessary to determine whether a particular map change would allow memory to be accessed in an impermissible way. Certain data about the map may be cached in order to allow the determination to be made more efficiently than performing an evaluation of the entire map.
REFERENCES:
patent: 5179441 (1993-01-01), Anderson et al.
patent: 5663891 (1997-09-01), Bamji et al.
patent: 5701460 (1997-12-01), Kaplan et al.
patent: 5729466 (1998-03-01), Bamji
patent: 5892900 (1999-04-01), Ginter et al.
patent: 5910987 (1999-06-01), Ginter et al.
patent: 5915019 (1999-06-01), Ginter et al.
patent: 5917912 (1999-06-01), Ginter et al.
patent: 5949876 (1999-09-01), Ginter et al.
patent: 5982891 (1999-11-01), Ginter et al.
patent: 5991408 (1999-11-01), Pearson et al.
patent: 6044445 (2000-03-01), Tsuda et al.
patent: 6154818 (2000-11-01), Christie
patent: 6237786 (2001-05-01), Ginter et al.
patent: 6253193 (2001-06-01), Ginter et al.
patent: 6271856 (2001-08-01), Krishnamurthy
patent: 6321314 (2001-11-01), Van Dyke
patent: 6336108 (2002-01-01), Thiesson et al.
patent: 6345265 (2002-02-01), Thiesson et al.
patent: 6363488 (2002-03-01), Ginter et al.
patent: 6389402 (2002-05-01), Ginter et al.
patent: 6427140 (2002-07-01), Ginter et al.
patent: 6529891 (2003-03-01), Heckerman
patent: 6938138 (2005-08-01), Beukema et al.
patent: 6963959 (2005-11-01), Hsu et al.
patent: 7415618 (2008-08-01), de Jong
patent: 2002/0116590 (2002-08-01), Franaszek et al.
patent: 2002/0118207 (2002-08-01), Jagla
patent: 2003/0048561 (2003-03-01), Kadokawa
patent: 2003/0077607 (2003-04-01), Hopfinger et al.
patent: 2003/0079103 (2003-04-01), Morrow
patent: 2003/0126398 (2003-07-01), Shinozaki
patent: 2003/0132947 (2003-07-01), Luo
patent: 2003/0200402 (2003-10-01), Willman et al.
patent: 2003/0200405 (2003-10-01), Willman et al.
patent: 2003/0200412 (2003-10-01), Peinado et al.
patent: 2003/0204693 (2003-10-01), Moran et al.
patent: 2004/0215907 (2004-10-01), Pizel et al.
patent: 2004/0221125 (2004-11-01), Anathanarayanan et al.
Bugnion, E. et al., “Disco: Running Commodity Operating Systems on Scalable Multiprocessors”,Proceedings of the 16thSymposium on Operating Systems Principles(SOSP), Oct. 1997, 1-14.
Coffing, C.L., “An x86 Protected Mode Virtual Machine Monitor for the MIT Exokernel”,Submitted to the Department of Electrical Engineering and Computer Science, May 1999, 1-109.
Goldberg, R.P., “Survey of Virtual Machine Research”,Computer, 34-45 Jun. 1974.
Popek, G.J. et al., “Formal Requirements for Virtualizable Third Generation Architectures”,Communications of the ACM, Jul. 1974, 17(7), 412-421.
Smith, J.E., “An Overview of Virtual Machine Architectures”, Oct. 26, 2001, 1-20.
Waldspurger, C.A., “Memory Resource Management in VMware ESX Server”,Proceedings of the 5thSymposium on Operating Systems Design and Implementation, Dec. 9-11, 2002, 1-15.
England Paul
Peinado Marcus
Amini Javid A
Microsoft Corporation
Tung Kee M
Woodcock & Washburn LLP
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