Method of reading flash memory device for depressing read...

Details Method of reading flash memory device for depressing read... Method of reading flash memory device for depressing read...

2007-12-27

2009-11-24

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185180, C365S185240, C365S185250, C365S185260, C365S185270, C365S185280

Reexamination Certificate

active

07623385

ABSTRACT:
Provided is a method of reading a flash memory device for depressing read disturb. According to the method, a first voltage is applied to a gate of the drain select transistor to turn on the drain select transistor, and a read voltage is applied to a gate of a selected transistor among the plurality of memory cells. Then, a pass voltage is applied to gates of unselected transistors among the plurality of memory cells. Furthermore, when the pass voltage is applied, a first pass voltage is applied and then a second pass voltage is applied after an elapse of a predetermined time following the applying of the first pass voltage. The second pass voltage has a level different from that of the first pass voltage.

REFERENCES:
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patent: 6240016 (2001-05-01), Haddad et al.
patent: 6611460 (2003-08-01), Lee et al.
patent: 6975542 (2005-12-01), Roohparvar
patent: 7064981 (2006-06-01), Roohparvar
patent: 2002-358792 (2002-12-01), None

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