Nonvolatile semiconductor memory device and method of...

Details Nonvolatile semiconductor memory device and method of... Nonvolatile semiconductor memory device and method of...

2007-05-22

2009-06-16

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185180, C365S185110, C365S185120, C365S185130, C365S185220, C365S230060, C365S185290

Reexamination Certificate

active

07548463

ABSTRACT:
A nonvolatile semiconductor memory device includes a memory array and an X-decode section. The memory array includes a plurality of nonvolatile memory cells arranged in a matrix form and a plurality of word lines. The X-decode section selects a selected word line selected from the plurality of word lines, supplies a negative voltage to the selected word line, and supplies a positive voltage to unselected word lines which are not the selected word line, at the time of an erase operation.

REFERENCES:
patent: 5973963 (1999-10-01), Sugawara
patent: 6233198 (2001-05-01), Choi
patent: 7254084 (2007-08-01), Terasawa et al.
patent: 2005/0243602 (2005-11-01), Umezawa
patent: 10-214495 (1998-08-01), None
patent: 2001-43693 (2001-02-01), None
patent: 2005-317138 (2005-11-01), None

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