Circuit for detecting zero result of addition/subtraction by sim

Details Circuit for detecting zero result of addition/subtraction by sim Circuit for detecting zero result of addition/subtraction by sim

1989-05-01

1991-05-28

Malzahn, David H.

Boots, shoes, and leggings

G06F 750

Patent

active

050200160

ABSTRACT:
A zero detection circuit operates to detect whether or not the result of addition/subtraction between a pair of binary numbers each composed of a plurality of bits becomes zero in all the plurality of bits. The zero detection circuit comprises a logic circuit receiving the pair of binary numbers A and B for generating a zero discrimination signal when anyone of the following four conditions is satisfied for each pair of bits of the same digit of the pair of binary numbers A and B:

REFERENCES:
patent: 3983382 (1976-09-01), Weinberger
patent: 4815019 (1989-03-01), Bosshart
patent: 4878189 (1989-10-01), Kawada

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