Systems for performing multiplication operations on operands...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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C708S511000

Reexamination Certificate

active

07546329

ABSTRACT:
A method for multiplying, at an execution unit of a processor, two complex numbers in which all four scalar multiplications, concomitant to multiplying two complex numbers, can be performed in parallel. A real part of a first complex number is multiplied at the execution unit by a real part of a second complex number to produce a first part of a real part of a third complex number. An imaginary part of the first complex number is multiplied at the execution unit by an imaginary part of the second complex number to produce a second part of the real part of the third complex number. A first arithmetic function is performed at the execution unit between the first part of the real part of the third complex number and the second part of the real part of the third complex number. The imaginary part of the first complex number is multiplied at the execution unit by the real part of the second complex number to produce a first part of an imaginary part of the third complex number. The real part of the first complex number is multiplied at the execution unit by the imaginary part of the second complex number to produce a second part of the imaginary part of the third complex number. A second arithmetic function is performed at the execution unit between the first part of the imaginary part of the third complex number and the second part of the imaginary part of the third complex number.

REFERENCES:
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patent: 4354249 (1982-10-01), King et al.
patent: 5262976 (1993-11-01), Young et al.
patent: 5576983 (1996-11-01), Shiokawa
patent: 5936872 (1999-08-01), Fischer et al.
patent: 7051061 (2006-05-01), Becker
patent: 2002/0161813 (2002-10-01), Chiueh et al.
patent: 2002/0169813 (2002-11-01), Pechanek et al.

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