Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package

Reexamination Certificate

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C257SE23002

Reexamination Certificate

active

07635912

ABSTRACT:
A resin layer covering a semiconductor chip on a wiring board is composed of a first resin layer and a second resin layer, wherein the first resin layer and the second resin layer differ in their plan view pattern, satisfying a relation of a<b, where “a” is difference in length in the direction from the center of the board towards the edges between the first resin layer and the second resin layer, and “b” is difference in length in the direction from the center of the board towards the corners between the first resin layer and the second resin layer.

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patent: 2006/0197207 (2006-09-01), Chow et al.
patent: 8-162573 (1996-06-01), None
patent: 10-22422 (1998-02-01), None

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