Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2005-05-16
2009-02-24
Clark, Jasmine J (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S739000, C257S758000, C257S762000, C257S773000, C257S774000, C257S776000, C257SE23020, C257SE23173, C257SE23174
Reexamination Certificate
active
07495335
ABSTRACT:
A method of forming a protective structure on a top metal line on an interconnect structure is disclosed. The method includes providing a plate opening in the passivation layer on the top metal line and forming a protective plate in the plate opening on the top metal line.
REFERENCES:
patent: 5172212 (1992-12-01), Baba
patent: 5235212 (1993-08-01), Shimizu et al.
patent: 5346858 (1994-09-01), Thomas et al.
patent: 5656863 (1997-08-01), Yasunaga et al.
patent: 5894170 (1999-04-01), Ishikawa
patent: 6265300 (2001-07-01), Bhansali et al.
patent: 6897570 (2005-05-01), Nakajima et al.
patent: 2001/0008311 (2001-07-01), Harada et al.
Clark Jasmine J
Taiwan Semiconductor Manufacturing Co. Ltd.
Tung & Associates
LandOfFree
Method of reducing process steps in metal line protective... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of reducing process steps in metal line protective..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of reducing process steps in metal line protective... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4054813