Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature
Reexamination Certificate
2007-03-21
2009-10-13
Sarkar, Asok K (Department: 2891)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having substrate registration feature
C257S797000, C257SE23179, C438S462000
Reexamination Certificate
active
07601605
ABSTRACT:
A method for manufacturing a semiconductor device includes the steps of: forming a first dielectric film on a substrate; etching the first dielectric film in a plug forming region to form a first via hole; forming a first plug electrode in the first via hole; forming a conductive film on the first dielectric film where the first plug electrode is formed; selectively etching the conductive film to form a local wiring on the first plug electrode and to form a pad layer on the first dielectric film in a specified region; forming a second dielectric film on the first dielectric film, thereby covering the local wiring and the pad layer; selectively etching the second dielectric film, thereby forming a second via hole in the second dielectric film with the local wiring as a bottom surface, and an opening section in the second dielectric film with the pad layer as a bottom surface; forming a metal film on the second dielectric film, thereby embedding the second via hole and the opening section; and applying a CMP processing to the metal film to remove the metal film on the second dielectric film, thereby forming a second plug electrode in the second via hole and forming an alignment mark on the pad layer.
REFERENCES:
patent: 6514851 (2003-02-01), Saito
patent: 6617669 (2003-09-01), Saito
patent: 6635567 (2003-10-01), Ebertseder et al.
patent: 6903002 (2005-06-01), Ben-Tzur et al.
patent: 2003/0017707 (2003-01-01), Yamashita et al.
patent: 2003/0119273 (2003-06-01), Aggarwal et al.
patent: 2004/0027786 (2004-02-01), Fujii et al.
patent: 2005/0265072 (2005-12-01), Hart et al.
patent: 2001-358048 (2001-12-01), None
patent: 2002-373974 (2002-12-01), None
patent: 2004-039731 (2004-02-01), None
patent: 2005-142252 (2005-06-01), None
Harness & Dickey & Pierce P.L.C.
Sarkar Asok K
Seiko Epson Corporation
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