Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Reexamination Certificate
2005-02-03
2009-10-20
Talbot, Brian K (Department: 1792)
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
C427S098400, C427S099100, C427S099500, C427S301000, C427S304000
Reexamination Certificate
active
07604835
ABSTRACT:
A method for manufacturing a wiring substrate includes the steps of (a) providing a first surface-active agent in first and second areas and of a substrate, (b) providing a second surface-active agent in the first area of the substrate, (c) providing a catalyst on the second surface-active agent, and (d) depositing a metal layer on the catalyst to thereby form a wiring composed of the metal layer along the first area.
REFERENCES:
patent: 3562038 (1971-02-01), Shipley
patent: 4668533 (1987-05-01), Miller
patent: 4682415 (1987-07-01), Adell
patent: 4898468 (1990-02-01), Udd
patent: 5021129 (1991-06-01), Arbach et al.
patent: 5114744 (1992-05-01), Cloutier et al.
patent: 2004/0259146 (2004-12-01), Friend et al.
patent: 3-132089 (1991-06-01), None
patent: 3-271375 (1991-12-01), None
patent: 10-065315 (1998-03-01), None
patent: 2003-129247 (2003-05-01), None
Examination result issued in corresponding Japanese application.
Furihata Hidemichi
Kimura Satoshi
Marumo Minoru
Harness & Dickey & Pierce P.L.C.
Seiko Epson Corporation
Talbot Brian K
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