Method of producing low and high voltage MOSFETs with reduced ma

Details Method of producing low and high voltage MOSFETs with reduced ma Method of producing low and high voltage MOSFETs with reduced ma

1993-09-27

1995-09-12

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437 34, 437147, H01L 218238

Patent

active

054496373

ABSTRACT:
An electroconductive or insulative film 100 is formed over a surface of a semiconductor substrate 1. A first photoresist 101 is coated over the film 100, and is then patterned. The film 100 is selectively removed by etching to expose a given area of the substrate 1. Subsequently an impurity of the first conductivity type is doped into the exposed area to form a first impurity region. After removing the first photoresist 101, a second photoresist 103 is coated entirely over the film 100, and is then patterned. Subsequently, the film 100 is selectively removed from another given area by etching. Another impurity of the second conductivity type is doped into the exposed area to form a second impurity region 104. Only the two steps of the photoresist patterning are carried out to form the impurity regions of the different conductivity types, thereby reducing production cost of the semiconductor device. The impurity can be doped by ion implantation while covering the film 100 with the photoresist, thereby facilitating micronization and integration of the semiconductor device.

REFERENCES:
patent: 4468852 (1984-09-01), Cerofolini
patent: 4558508 (1985-12-01), Kinney et al.
patent: 4628341 (1986-12-01), Thomas
patent: 4902634 (1990-02-01), Picco
patent: 5130271 (1992-07-01), Migita

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