Method of fabricating a semiconductor memory

Fishing – trapping – and vermin destroying

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Details

Other Related Categories

437 47, 437 60, 437919, H01L 218242

Type

Patent

Status

active

Patent number

054496357

Description

ABSTRACT:
A method for fabricating a semiconductor memory, including the steps of: forming transistors on a semiconductor substrate (100); forming a first insulation film (23, 24, 25) on the semiconductor substrate; forming contact holes by selectively etching the first insulation film; forming successively a first conductive layer (26), an etch preventing film (27), and a first temporary film (28) on the substrate and the contact holes; etching the first temporary film and the etch preventing film to selectively expose the first conduction layer; forming a second temporary film (30) on the first temporary film and the first conductive layer; etching the second temporary film to form sidewall spacers of the second temporary film at sidewalls of the first temporary film; patterning the first conduction film using the first temporary film and the sidewall spacers as masks; forming a second insulation film (31) on the first conductive layer, the sidewall spacers and the first temporary film; etching the second insulation film selectively removing the temporary film and the sidewall spacers; forming a second conductive film (34) on the second insulation film, the first conductive layer and the etch preventing film; etching the second conductive layer to form a capacitor storage node (35) composed of the first conduction layer and the second conduction layer by removing the second insulation film.

REFERENCES:
patent: 5049957 (1991-09-01), Inoue et al.
patent: 5068698 (1991-11-01), Koyama
patent: 5071781 (1991-12-01), Seo et al.
patent: 5102820 (1992-04-01), Chiba
patent: 5164337 (1992-11-01), Ogawa et al.
patent: 5219780 (1993-06-01), Jun
patent: 5314835 (1994-02-01), Iguchi et al.

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