Method for fabricating an ultra-high-density alternate metal vir

Fishing – trapping – and vermin destroying

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437 50, 437 52, 437250, H01L 21265

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active

054496330

ABSTRACT:
The present invention provides an alternate metal virtual ground (AMG) read only memory (ROM) array formed in a silicon substrate of P-type silicon. The array includes a ROM cell matrix which is defined by a plurality of rows and a plurality of columns of ROM data storage cells. The AMG ROM array includes a plurality of parallel, spaced-apart buried N+ bit lines formed in the silicon substrate. Alternate buried N+ bit lines are contacted by a conductive metal line at two contact locations within an array segment to thereby define contacted drain bit lines of the ROM cell matrix. Each buried N+ bit line that is between two adjacent contacted drain bit lines is non-contacted. Each non-contacted bit line is segmented into a length sufficient to form the segmented source bit line for a preselected plurality of ROM data storage cells, thereby defining a column of the ROM data storage cells in the ROM segment. That is, a first column of ROM data storage cells is connected between the segmented source bit line and the first adjacent contacted drain bit line. A second column of ROM data storage cells is connected between the segmented source line and the second adjacent contacted drain bit line.

REFERENCES:
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patent: 5204835 (1993-04-01), Eitan
patent: 5241497 (1993-08-01), Komarek
patent: 5372961 (1994-12-01), Noda
Okada, M. et al., "16Mb Rom Design Using Bank Select Architecture", Symposium on VLSI Circuits-Digest of Technical Papers 1988, Tokyo, Japan, pp. 85-86.

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