Non-volatile memory having a row driving circuit with shared...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185180

Reexamination Certificate

active

07468916

ABSTRACT:
Non-volatile memory includes a row driving circuit with shared level shift circuits, so as to minimize the chip area of the non-volatile memory. The row driving circuit includes a plurality of word line driving circuits, a plurality of level shift high circuits, and a plurality of level shift low circuits. The plurality of word line driving circuits share the plurality of level shift high circuits and the plurality of level shift low circuits. Each word line driving circuit includes a plurality of driving units, a level shift high circuit, and a level shift low circuit. The plurality of driving units share the level shift high circuit and the level shift low circuit of the word line driving circuit.

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