Memory device programming using combined shaping and linear...

Static information storage and retrieval – Analog storage systems

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S185030, C365S191000

Reexamination Certificate

active

07466575

ABSTRACT:
A method for data storage includes accepting data for storage in a memory (28) that includes multiple analog memory cells (32). The data is converted to input values. The input values are filtered using a non-linear filtering operation to produce respective shaped values, and the shaped values are converted to output values using a linear spreading transformation with coefficients chosen so that each of the shaped values contributes to at least two of the output values. The non-linear filtering operation is selected so as to reduce a size of an output range in which the output values lie. The output values are stored in the respective analog memory cells.

REFERENCES:
patent: 4910706 (1990-03-01), Hyatt
patent: 5479170 (1995-12-01), Cauwenberghs et al.
patent: 5838832 (1998-11-01), Barnsley
patent: 6134631 (2000-10-01), Jennings, III
patent: 6212654 (2001-04-01), Lou et al.
patent: 6307776 (2001-10-01), So et al.
patent: 6397364 (2002-05-01), Barkan
patent: 6467062 (2002-10-01), Barkan
patent: 7266026 (2007-09-01), Gongwer et al.
patent: WO 2007132453 (2007-11-01), None
Bez et al., “Introduction to Flash Memory,” Proceedings of the IEEE, vol. 91, No. 4, Apr. 2003, pp. 489-502.
Eitan et al., “Multilevel Flash Cells and their Trade-Offs,” Proceedings of the 1996 IEEE International Electron Devices Meeting (IEDM)5 New York, New York, pp. 169-172.
Eitan et al., “Can NROM, a 2-bit, Trapping Storage NVM Cell, Give a Real Challenge to Floating Gate Cells?” Proceedings of the 1999 International Conference on Solid State Devices and Materials (SSDM), Tokyo, Japan, Sep. 21-24, 1999, pp. 522-524.
Maayan et al., “A 512Mb NROM Flash Data Storage Memory with 8MB/s Data Rate,” Proceedings of the 2002 IEEE International Solid-State Circuits Conference (ISSCC 2002), San Francisco, California, Feb. 3-7, pp. 100-101.
Kim and Koh, “Future Memory Technology including Emerging New Memories,” Proceddings of the 24 International Conference on Microelectronics (MIEL 2004), Nis, Serbia, and Montenegro, May 16-19, 2004, vol. 1, pp. 377-384.
Shalvi et al., “Signal Codes,” The 2003 IEEE Information Theory Workshop (ITW2003), Paris, France, Mar. 31-Apr. 14, 2003.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Memory device programming using combined shaping and linear... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory device programming using combined shaping and linear..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory device programming using combined shaping and linear... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4041202

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.