Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2005-05-25
2008-11-04
Pham, Ly D (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S189030, C365S189050, C365S191000, C365S233110, C365S233180
Reexamination Certificate
active
07447109
ABSTRACT:
Disclosed is a semiconductor storage device which has a shared address/data terminal that shares an address terminal and a data terminal. In a latency period extending from receipt of an access command to a cell array to input or output of data, which corresponds to an access command, from the shared address/data terminal, pipeline control is performed in response to receipt of at least one other access command. Input or output of data from the shared address/data terminal corresponding to the other access commands is performed successively following data that corresponds to the initial access command.
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Takahashi Hiroyuki
Takano Susumu
McGinn IP Law Group PLLC
NEC Electronics Corporation
Pham Ly D
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