Method and delay circuit with accurately controlled duty cycle

Details Method and delay circuit with accurately controlled duty cycle Method and delay circuit with accurately controlled duty cycle

2006-06-23

2008-12-09

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Rectangular or pulse waveform width control

C327S172000

Reexamination Certificate

active

07463075

ABSTRACT:
A delay locked loop includes a storage element coupled to a data bus and produces a data synchronization signal. A phase detector receives a data clock signal and the data synchronization signal and produces a delay control signal. A first delay circuit produces a signal which is delayed relative to the data clock signal according to the delay control signal. A second delay circuit receiving the delayed signal produces a control signal coupled to a control input of the storage element by delaying the delayed signal an amount which causes the control signal to have a predetermined duty cycle.

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