Methods for lateral current carrying capability improvement...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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C257S775000, C257S776000, C257SE23145, C257SE23169, C257SE23175, C257SE21627, C257SE21641

Reexamination Certificate

active

07453151

ABSTRACT:
A semiconductor structure and methods for forming the same. The semiconductor structure includes (a) a substrate; (b) a first semiconductor device on the substrate; (c) N ILD (Inter-Level Dielectric) layers on the first semiconductor device, wherein N is an integer greater than one; and (d) an electrically conductive line electrically coupled to the first semiconductor device. The electrically conductive line is adapted to carry a lateral electric current in a lateral direction parallel to an interfacing surface between two consecutive ILD layers of the N ILD layers. The electrically conductive line is present in at least two ILD layers of the N ILD layers. The electrically conductive line does not comprise an electrically conductive via that is adapted to carry a vertical electric current in a vertical direction perpendicular to the interfacing surface.

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patent: 2005/0098896 (2005-05-01), Huang et al.
patent: 55141739 (1980-11-01), None

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