Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-10-05
2008-12-02
Nguyen, Dang T (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185180, C365S189090
Reexamination Certificate
active
07460408
ABSTRACT:
A semiconductor memory device includes a plurality of word lines, first and second bit lines, a plurality of memory cells which are connected to the first and second bit lines, a differential amplifier which is connected to one end of the first bit line and one end of the second bit line, a reference-current generating circuit which is connected to the other end of the second bit line and which generates a reference-current smaller than the cell current of the memory cells, and a dummy word line which is connected to the reference-current generating circuit, to activate the reference-current generating circuit in order to read data.
REFERENCES:
patent: 2005/0232058 (2005-10-01), Yabe
patent: 2007/0025140 (2007-02-01), Redwine
patent: 2007/0194833 (2007-08-01), Takeyama et al.
Kevin Zhang, et al., “The Scaling of Data Sensing Schemes for High Speed Cache Design in Sub-0. 18μm Technologies”, 2000 Symposium on VLSI Circuits Digest of Technical Papers, IEEE, Jan. 2000, pp. 226-227.
Kabushiki Kaisha Toshiba
Nguyen Dang T
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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